DocumentCode
336227
Title
A parallel residue-to-binary converter
Author
Wei Wang ; Swamy, M.N.S. ; Ahmad, M.O. ; Wang, Yuke
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Volume
3
fYear
1999
fDate
15-19 Mar 1999
Firstpage
1541
Abstract
A high-speed parallel residue-to-binary converter is proposed for the moduli set Sk={2m-1, 22(0)m+1, 2 2(l)m+1, L, 2
Keywords
adders; carry logic; convertors; logic design; parallel algorithms; residue number systems; concatenation operations; cyclic shift; hardware; moduli set; parallel residue-to-binary converter; Arithmetic; Cathode ray tubes; Concurrent computing; Dynamic range; Fault tolerant systems; Hardware; Parallel processing; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on
Conference_Location
Phoenix, AZ
ISSN
1520-6149
Print_ISBN
0-7803-5041-3
Type
conf
DOI
10.1109/ICASSP.1999.756279
Filename
756279
Link To Document