DocumentCode :
3362528
Title :
Signaling scheme for high speed die-to-die interconnection in multi-chip package (MCP) technology
Author :
Khang Choong Yong ; Bok Eng Cheah ; Wil Choon Song ; Ain, M.F.
Author_Institution :
Intel Microelectron. (M) Sdn. Bhd, Halaman Kampung Jawa, Malaysia
fYear :
2013
fDate :
11-13 Dec. 2013
Firstpage :
173
Lastpage :
177
Abstract :
Multi-chip package (MCP) technology has recently advanced as an alternative packaging solution to enable high performance and power-efficient mobile electronic devices. The wide adoptions of MCP technology are mainly driven by reduced circuit complexity, heterogeneous integration across different silicon process technology and shorter product cycle time. However, the high density on-package die-to-die (D2D) interconnects within package presents unique signaling challenges as the operating frequency continue to rise. This paper analyzes various low power passive signaling enhancement techniques e.g. equalization and termination to mitigate the signal integrity challenges of the high speed on-package D2D channels. The effectiveness of various signaling enhancement techniques and topologies were studied and compared in terms of eye opening and overshoot performances. The combination of series-source termination and parallel-load termination was found to be a feasible candidate in view of optimum trade-off between performance and silicon real-estate or costs. Simulation results show the recommended topology is able to achieve 300mV/40ps eye opening at 15Gbps.
Keywords :
high-speed techniques; integrated circuit interconnections; microassembling; multichip modules; MCP technology; heterogeneous integration; high performance mobile electronic devices; high speed die to die interconnection; low power passive signaling enhancement techniques; multichip package technology; parallel load termination; power efficient mobile electronic devices; reduced circuit complexity; series source termination; signaling scheme; Crosstalk; Integrated circuit interconnections; Performance evaluation; Receivers; Reflection; Silicon; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
Conference_Location :
Singapore
Print_ISBN :
978-1-4799-2832-3
Type :
conf
DOI :
10.1109/EPTC.2013.6745707
Filename :
6745707
Link To Document :
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