Title :
Lock detector with stable parameters
Author :
Hovsepyan, Aristakes ; Melikyan, Vazgen ; Ishkhanyan, Mkrtich ; Hakobyan, Tigran ; Harutyunyan, Grigor
Author_Institution :
Synopsys Armenia CJSC, Armenia
Abstract :
The purpose of this work is to add one more circuit into the PLL to define the lock condition. New types of PLL lock detectors, the principles of their operation, parametrical comparisons are presented. Presented circuits provide a simple design and independence from supply voltage (analog lock detector) or design automation (fully digital lock detector).
Keywords :
network synthesis; phase locked loops; PLL; lock detector; Counting circuits; Delay; Flip-flops; Output feedback; Phase detection; Phase frequency detector; Phase locked loops; Space vector pulse width modulation; Voltage; Voltage-controlled oscillators;
Conference_Titel :
Design and Test Workshop (IDT), 2009 4th International
Conference_Location :
Riyadh
Print_ISBN :
978-1-4244-5748-9
DOI :
10.1109/IDT.2009.5404162
