DocumentCode :
3363037
Title :
Design procedure for fully integrated 900 MHz medium power amplifiers in 0.6 /spl mu/m CMOS technology on latchup resistant epi-substrate
Author :
Baureis, P. ; Peter, M. ; Hein, H. ; Oehler, F.
Author_Institution :
Univ. of Appl. Sci., Wurzburg, Germany
fYear :
2001
fDate :
14-14 Sept. 2001
Firstpage :
142
Lastpage :
148
Abstract :
A design procedure is developed for the integration of RF-circuits in a 0.6 /spl mu/m CMOS process on latchup resistant epi-substrates. The proposed method was developed by performing resimulation of a fully integrated medium power amplifier (PA) which delivers 21 dBm output power and 31% power added efficiency (PAE) at 1.1 GHz. To understand the measured circuit behavior, a detailed description of all wires with respect to capacitive substrate coupling and inclusion of mutual inductances is necessary. Scalable lumped element models based on foundry given process parameters are developed which allow the inclusion of relevant layout parasitics. Yield analysis based on the foundry process parameter spreads show that the fabricated PA will have a minimum PAE of 21% at 100% yield.
Keywords :
CMOS analogue integrated circuits; MMIC power amplifiers; UHF power amplifiers; capacitance; circuit simulation; inductance; integrated circuit design; integrated circuit measurement; integrated circuit modelling; 0.6 micron; 1.1 GHz; 21 percent; 31 percent; 900 MHz; CMOS process; CMOS technology; RF-circuit integration; capacitive substrate coupling; design procedure; foundry given process parameters; foundry process parameter spreads; integrated medium power amplifier; integrated medium power amplifiers; latchup resistant epi-substrate; layout parasitics; measured circuit behavior; minimum PAE; mutual inductances; output power; power added efficiency; process yield; resimulation; scalable lumped element models; yield analysis; CMOS technology; Capacitors; Circuit simulation; Inductors; Isolation technology; Power amplifiers; Radio frequency; Signal processing; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2001. Digest of Papers. 2001 Topical Meeting on
Conference_Location :
Ann Arbor, MI, USA
Print_ISBN :
0-7803-7129-1
Type :
conf
DOI :
10.1109/SMIC.2001.942356
Filename :
942356
Link To Document :
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