Leakage Analysis for FinFET Devices using Self-Consistent Electro-Thermal Modeling

Author

Kumar, Satish ; Joshi, Rajiv V. ; Chuang, C.T. ; Kim, K. ; Murthy, J.Y.

Author_Institution

Purdue Univ., Lafayette

fYear

2007

fDate

May 30 2007-June 1 2007

Firstpage

1

Lastpage

4

Abstract

A novel 3D computational self-consistent electro-thermal modeling methodology is developed to more precisely analyze leakage currents in nanoscale FinFET devices. The coupled electro-thermal modeling is applied to compare the device performance of poly-Si gate and metal-gate DG-FinFET. Results show very high leakage current in band-edge metal-gate device and poly-Si gate device. Mid-gap metal-gate device appears as a good choice at short-channel lengths to avoid excessive leakage power. The impact of device temperature rise on the leakage and drive currents is analyzed.

Keywords

MOSFET; leakage currents; FinFET devices; Si; band-edge metal-gate device; coupled electro-thermal modeling; excessive leakage power; leakage analysis; leakage currents; metal-gate DG-FinFET; mid-gap metal-gate device; poly-Si gate; self-consistent electro-thermal modeling; short-channel lengths; Boundary conditions; CMOS technology; Computational modeling; Conductive films; Electronic packaging thermal management; FinFETs; Phonons; Resistance heating; Temperature; Thermal conductivity; FinFET; Leakage; Power;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuit Design and Technology, 2007. ICICDT '07. IEEE International Conference on

Conference_Location

Austin, TX

Print_ISBN

1-4244-0757-5

Electronic_ISBN

1-4244-0757-5

Type

conf

DOI

10.1109/ICICDT.2007.4299544

Filename

4299544