Digital receiver architectures for the IEEE 802.15.4 standard

Author

Scolari, Nicola ; Enz, Christian C.

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

4

fYear

2004

fDate

23-26 May 2004

Abstract

This paper describes an analysis of different digital radio receiver architectures for the IEEE 802.15.4 standard, focusing on the analog-to-digital converter (ADC). This standard has been developed for low bit-rate, low-power wireless personal area networks (WPAN). The choice of the best architecture depends on many factors, among which the power consumption, the integration suitability, the image rejection, the flicker and quantization noise, etc. There are mainly three basic architectures suitable for a low-power implementation: a) the direct conversion, b) the low-IF with low-pass ΔΣ ADC and c) the low-IF with quadrature bandpass ΔΣ ADC. Each of these architecture is analyzed in order to identify the trade-offs and select the most suitable for the IEEE 802.15.4 standard.

Keywords

analogue-digital conversion; flicker noise; power consumption; quantisation (signal); radio access networks; radio receivers; ADC; IEEE 802.15.4 standard; analog-digital converter; digital radio receiver; digital receiver architecture; direct conversion; flicker; image rejection; integration suitability; power consumption; quadrature bandpass; quantization noise; wireless personal area networks; 1f noise; Analog-digital conversion; Bit error rate; Energy consumption; Image converters; Physical layer; Quantization; Receivers; Standards development; Wireless personal area networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329011

Filename

1329011