DocumentCode :
3363543
Title :
Effect of Cu seed layer aging on Cu filling failure in through Si vias (TSVs)
Author :
Jae Woong Choi ; Ong Lee Guan ; Mao Yingjun ; Xie Jielin ; Chow Choi Lan ; Soon-Wook Kim ; Murthy, Ramana ; Swee Kiat, Eugene Tan ; Wickramanayaka, Sunil
Author_Institution :
Inst. of Microelectron., Agency for Sci., Technol. & Res. (A*STAR), Singapore, Singapore
fYear :
2013
fDate :
11-13 Dec. 2013
Firstpage :
420
Lastpage :
423
Abstract :
The step coverage of a Cu seed layer is one of critical factors to be controlled in order to achieve void-free TSV for 2.5D and 3D IC. The step coverage of a Cu seed layer can be changed by aging of the Cu seed layer with time and there are two mechanisms in its aging. The one was the oxidation of a Cu seed layer which can change the step coverage by changing the actual thickness of the Cu seed layer. The other was the self-annealing of a Cu seed layer which can change the step coverage by changing the electrical resistivity due to its grain growth. Both of them can result in higher terminal effect causing the failure of void-free TSV Cu filling.
Keywords :
ageing; annealing; copper; grain growth; three-dimensional integrated circuits; 2.5D IC; 3D IC; Cu; electrical resistivity; grain growth; seed layer aging; self-annealing; terminal effect; through Si vias; void-free TSV filling; Conferences; Decision support systems; Electronics packaging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
Conference_Location :
Singapore
Print_ISBN :
978-1-4799-2832-3
Type :
conf
DOI :
10.1109/EPTC.2013.6745755
Filename :
6745755
Link To Document :
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