Effects of Drift-Region Design on the Reliability of Integrated High-Voltage LDMOS Transistors

Author

Chen, Jone F. ; Chen, Shiang-Yu ; Tian, Kuen-Shiuan ; Wu, Kuo-Ming ; Su, Yan-Kuin ; Liu, C.M. ; Hsu, S.L.

Author_Institution

Nat. Cheng Kung Univ., Tainan

fYear

2007

fDate

May 30 2007-June 1 2007

Firstpage

1

Lastpage

4

Abstract

Effects of drift-region design on the hot-carrier reliability of n-channel integrated high-voltage lateral diffused MOS (LDMOS) transistors are investigated. LDMOS devices with various dosages of n-type drain drift (NDD) implant and various drift-region lengths (L_d) are studied. Results show that higher NDD dosage can reduce hot-carrier induced on-resistance (R_on) degradation. The shift in damage location is suggested to be the main cause. In addition, longer L_d can reduce R_on degradation significantly because of less lateral electric field. Our analysis indicates that higher NDD dosage and longer L_d are effective for improving the device lifetime of the LDMOS transistors.

Keywords

CMOS integrated circuits; power MOSFET; semiconductor device reliability; CMOS integrated circuit; damage location; device lifetime; drift-region design; hot-carrier reliability; integrated high-voltage LDMOS transistors; n-channel integrated high-voltage lateral diffused MOS transistors; on-resistance degradation; CMOS technology; Degradation; Hot carrier effects; Hot carriers; Implants; Integrated circuit reliability; MOSFETs; Semiconductor device reliability; Stress; Voltage; LDMOS transistor; hot-carrier; integrated high-voltage device; reliability;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuit Design and Technology, 2007. ICICDT '07. IEEE International Conference on

Conference_Location

Austin, TX

Print_ISBN

1-4244-0757-5

Electronic_ISBN

1-4244-0757-5

Type

conf

DOI

10.1109/ICICDT.2007.4299554

Filename

4299554