Title :
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
Author :
Tsai, Hung-Chieh ; Yeh, Jyh-Yih ; Tu, Wei-Hsuan ; Lee, Tai-Cheng ; Wang, Chorng-Kuang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A 10 Gbase-LX4 receiver front end including an inductor feedback transimpedance amplifier and a modified Cherry-Hooper cell limiting amplifier realized in a 0.18 μm CMOS process is described. The receiver front end covers 34.8 dB input dynamic range and provides 66 dBΩ differential gain with 1.7 GHz bandwidth. All the building blocks achieve a high data rate with low power dissipation. The receiver front end can meet the BER requirement under all corner simulations with 113 ps(pp) data jitter at 3.125 Gb/s. The chip area is 1.1×2.2 mm2 and consumes 54 mW using 1.8 V supply voltage. The overall performance is verified by the measured results.
Keywords :
CMOS integrated circuits; differential amplifiers; error statistics; feedback amplifiers; integrated circuit modelling; jitter; optical fibre communication; optical receivers; transceivers; 0.18 micron; 1.7 GHz; 1.8 V; 3.125 Gbit/s; 54 mW; BER; CMOS process; LX4 receiver front end transimpedance amplifier; bit error rate; data jitter; differential gain; input dynamic range; modified Cherry-Hooper cell limiting amplifier; power dissipation; Bandwidth; Bit error rate; CMOS process; Dynamic range; Feedback; Inductors; Jitter; Power dissipation; Semiconductor device measurement; Voltage;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329023
