DocumentCode
3363736
Title
An Offset Cancellation Technique for Two-Stage CMOS Operational Amplifiers
Author
Lu, Chih-Wen
Author_Institution
Nat. Chi Nan Univ., Puli
fYear
2007
fDate
May 30 2007-June 1 2007
Firstpage
1
Lastpage
3
Abstract
An offset cancellation technique for two-stage CMOS operational amplifiers is proposed. The auxiliary amplifiers are employed to cancel the offset voltage. The error voltage is stored on a capacitor during the cancellation phase and is canceled during the normal operation. An experimental prototype amplifier implemented in a 0.35-mum CMOS technology demonstrates that the offset voltage is reduced to 1.898 mV under a clock frequency of 200 KHz.
Keywords
CMOS analogue integrated circuits; low-power electronics; operational amplifiers; auxiliary amplifier; capacitor; offset cancellation technique; size 0.35 mum; two-stage CMOS operational amplifiers; voltage 1.898 mV; CMOS technology; Clocks; Differential amplifiers; Feedback; Frequency; Operational amplifiers; Power supplies; Prototypes; Switched capacitor circuits; Voltage measurement; offset; offset cancellation; offset voltage; op-amp; operational amplifier;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2007. ICICDT '07. IEEE International Conference on
Conference_Location
Austin, TX
Print_ISBN
1-4244-0757-5
Electronic_ISBN
1-4244-0757-5
Type
conf
DOI
10.1109/ICICDT.2007.4299561
Filename
4299561
Link To Document