Title :
A new approach to realize UART
Author :
Yongcheng Wang ; Kefei Song
Author_Institution :
Changchun Inst. of Opt., Chinese Acad. of Sci., Changchun, China
Abstract :
In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol, a method to implement UART communications based on programmable logic device is proposed in the paper. In the proposed method, the core function of UART is integrated in CPLD with VHDL. Firstly, UART data frame format and operational principle of UART were introduced after reviewing some methods to realize UART. The methods to implement UART transmitter, UART receiver and baudrate generator using VHDL were illustrated in detail. Then pre-simulation and synthesize of VHDL program were executed. Finally, the test with bit error rate was carried out on physical system. Experimental results indicate that 75 percent of the GLB are used by UART, and the bit error rate is less than 10-9. The experiment was implemented utilizing the RS-422 protocol and the baudrate is 62.5kb/s. The proposed method can satisfy the system requirements of high integration, stabilization, low bit error rate, strong anti-jamming and low cost.
Keywords :
computer interfaces; data communication equipment; error statistics; hardware description languages; programmable logic devices; protocols; CPLD; DART data frame format; DART transmitter; DSP; GLB; RS-422 protocol; VHDD; VHDL program; asynchronous communication protocol; baudrate generator; bit error rate; operational principle; programmable logic device; synchronous serial port; Bit error rate; Clocks; Digital signal processing; Receivers; Registers; Switches; Transmitters; DSP; UART; VHDL; programmable logic device; simulation;
Conference_Titel :
Electronic and Mechanical Engineering and Information Technology (EMEIT), 2011 International Conference on
Conference_Location :
Harbin, Heilongjiang, China
Print_ISBN :
978-1-61284-087-1
DOI :
10.1109/EMEIT.2011.6023602