Advanced Statistical Methodology for 6T-SRAM Design

As pointed out by several authors, classical 6T SRAM will face important issues partly due to process spreads leading to transistor mismatch. This becomes particularly relevant at the 45 nm node: the "classical" statistical hypotheses are no longer accurate enough to predict the memory yield and reliability. This paper presents a new statistical analysis method based on design of experiments (DOE) to work with sufficient confidence over the technology spreads. This method is very computationally efficient and provides the accuracy needed to reach customer specifications.