Title :
Low Power Non-Recursive Decimation Filters
Author :
Zhang, Chi ; Ofner, Erwin
Author_Institution :
Carinthia Univ. of Appl. Sci., Villach
Abstract :
This work proposes low power non-recursive decimation filters in a GSM (Global System for Mobile communication) and UMTS (Universal Mobile Telecommunications System) dual mode sigma delta ADC. The proposed technique is an alternative to the standard CIC (Cascaded Integrator-Comb) approach with a decimation factor of m-th power of two and m-th power of three. 70% to 80% power consumption can be saved by the non-recursive structure compared to the Hogenauer CIC architecture. More research is done to find the break-even point of silicon area for non-recursive and recursive architectures. A low power decimation filter chip for a UMTS and GSM dual mode sigma delta A/D converter is fabricated in 0.35¿m CMOS (Complementary Metal-Oxide-Semiconductor) and consumes 4.72mW in GSM and 5.54mW in UMTS mode, both at Vdd=2.5V.
Keywords :
3G mobile communication; CMOS integrated circuits; analogue-digital conversion; cellular radio; CMOS; GSM; Hogenauer CIC architecture; UMTS; cascaded integrator-comb; complementary metal-oxide- semiconductor; dual mode sigma delta A/D converter; dual mode sigma delta ADC; global system for mobile communication; low power decimation filter chip; low power nonrecursive decimation filters; nonrecursive architectures; power consumption; universal mobile telecommunications system; 3G mobile communication; Clocks; Delta-sigma modulation; Energy consumption; Finite impulse response filter; Frequency; GSM; Power filters; Sampling methods; Silicon;
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
DOI :
10.1109/ICECS.2007.4511113