• DocumentCode
    3364702
  • Title

    Glass interposer substrates: Fabrication, characterization and modeling

  • Author

    Keech, John ; Piech, Garrett ; Pollard, Stephen ; Chaparala, Satish ; Shorey, Aric ; Bor Kai Wang

  • Author_Institution
    Corning Inc., Taipei, Taiwan
  • fYear
    2013
  • fDate
    11-13 Dec. 2013
  • Firstpage
    706
  • Lastpage
    709
  • Abstract
    There is growing interest in applying glass as a substrate for 2.5D/3D applications. Glass has many material properties that make it well suited for interposer substrates. Glass based solutions provide significant opportunities for cost benefits by leveraging economies of scale as well as forming substrates at design thickness. A lot of work is being done to validate the value of glass as an interposer substrate. One important area is the electrical performance of glass relative to silicon. Because glass is an insulator, it is expected to have better electrical performance than silicon. Electrical characterization and electrical models demonstrate the advantages of the insulating properties of glass, and its positive impact on functional performance. Further advantages are anticipated in reliability performance, because of the ability to adjust thermal properties such as coefficient of thermal expansion (CTE) of glass. Modeling results demonstrating these improvements will be presented. Additionally, significant progress has been made in the demonstration of glass interposer fabrication. Fully patterned wafers and panels with through holes and blind holes are being fabricated today. Leveraging existing downstream processes for metallization on these substrates is also important for cost effectiveness and ease of transition into production. Progress on demonstrating the ability to leverage existing downstream processes to make functional glass interposers using both through and blind via technology will be presented.
  • Keywords
    glass; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; thermal expansion; 2.5D-3D applications; CTE; blind holes; blind via technology; coefficient of thermal expansion; cost effectiveness; design thickness; electrical characterization; electrical models; electrical performance; fully patterned wafers; functional glass interposers; glass interposer fabrication; glass interposer substrates; insulating property; metallization; reliability performance; through holes; Filling; Finite element analysis; Glass; Material properties; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4799-2832-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2013.6745811
  • Filename
    6745811