• DocumentCode
    3364859
  • Title

    Development of package level hybrid silicon heat sink for hotspots cooling

  • Author

    Lau, B.L. ; Lee, Y.J. ; Yong Han ; Leong, Yoke Choy ; Choo, Kok Fah ; Xiaowu Zhang ; Chan, P.K.

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2013
  • fDate
    11-13 Dec. 2013
  • Firstpage
    741
  • Lastpage
    746
  • Abstract
    In this paper, the fabrication of package level silicon microchannel heat sink for hotspot thermal management is presented. These include the design, micro fabrication process and chip level integration of a hybrid silicon heat sink, which integrates jet impingement, microchannel cooling technologies. The fabrication of hybrid heat sink is proposed by bonding two Si chips which patterned with nozzle and microchannel structures separately. The nozzle array is fabricated using though silicon vias (TSV) process. This nozzle plate is used to generate jet impingement effect into the microchannel heat sink. On the other hand, the microchannel heat sink consists of micro fins and channels which are fabricated using deep reactive ion etch (DRIE) process. The micro fins increase the area for convective heat transfer while the micro channels serve as the liquid conduit to carry the intense heat away from the heat source. Two silicon chips are bonded using thermal compression bonding (TCB) process. For the packaging, the integration of thermal chip and diamond heat spreader onto silicon heat sink is performed using gold-tin eutectic bonding through TCB process. In this paper, the major fabrication steps and critical process parameters will be discussed in details along with the hydraulic test and thermal analysis.
  • Keywords
    bonding processes; cooling; elemental semiconductors; eutectic alloys; gold alloys; heat sinks; integrated circuit design; integrated circuit manufacture; microfabrication; silicon; sputter etching; thermal management (packaging); three-dimensional integrated circuits; tin alloys; Au-Sn; DRIE; Si; TSV; chip level integration; convective heat transfer; deep reactive ion etch; diamond heat spreader; eutectic bonding; hotspots cooling; hydraulic test; micro channels; micro fins; microchannel cooling; microchannel structures; microfabrication process; package level silicon microchannel heat sink; thermal analysis; thermal chip; thermal compression bonding; thermal management; though silicon vias; Conferences; Diamonds; Electronics packaging; Microchannel; Silicon; Thermal force; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4799-2832-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2013.6745819
  • Filename
    6745819