Title :
Pseudo-exhaustive testing of sequential circuits
Author :
Shaer, Bassam ; Al-Arian, Sami A. ; Landis, David
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., MN, USA
Abstract :
A new sequential circuit partitioning algorithm is introduced which enhances pseudo-exhaustive testing. Our PIFAN algorithm is based on an analysis of Primary Input cones and FANout values. Results are presented which show that PIFAN offers significant reductions in hardware overhead and test time when compared to alternative partitioning algorithms
Keywords :
VLSI; automatic testing; integrated circuit testing; integrated logic circuits; logic partitioning; logic testing; sequential circuits; PIFAN algorithm; circuit partitioning algorithm; fanout values; hardware overhead reduction; primary input cones; pseudo-exhaustive testing; sequential circuits; test time reduction; Algorithm design and analysis; Automatic testing; Circuit testing; Costs; Design engineering; Design for testability; Logic testing; Sequential analysis; Sequential circuits; Very large scale integration;
Conference_Titel :
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location :
Ypsilanti, MI
Print_ISBN :
0-7695-0104-4
DOI :
10.1109/GLSV.1999.757388
