DocumentCode
336503
Title
A Spiffy tool for the simultaneous placement and global routing for three-dimensional field-programmable gate arrays
Author
Karro, John ; Cohoon, James P.
Author_Institution
Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA
fYear
1999
fDate
4-6 Mar 1999
Firstpage
230
Lastpage
231
Abstract
FPGAs are a useful and flexible alternative to custom design chips, but can suffer from severe interconnection delay. The 3D-FPGA is an alternative to the two-dimensional architecture that has been proposed to reduce these delay problems. Here we present Spiffy-the first tool specifically designed for the placement and global routing of 3D-FPGAs. Spiffy produces some of the best results in the literature, and using Spiffy we can show that when mapped to the 3D-FPGA architecture, circuits tend to have considerably shorter net-length, making this new chip an improvement over the standard architecture
Keywords
circuit layout CAD; delays; field programmable gate arrays; integrated circuit interconnections; integrated circuit layout; logic CAD; network routing; FPGAs; Spiffy tool; global routing; interconnection delay; net-length; placement; three-dimensional field-programmable gate arrays; Computer science; Costs; Field programmable gate arrays; Hip; Integrated circuit interconnections; Logic arrays; Logic functions; Read only memory; Routing; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location
Ypsilanti, MI
ISSN
1066-1395
Print_ISBN
0-7695-0104-4
Type
conf
DOI
10.1109/GLSV.1999.757418
Filename
757418
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