• DocumentCode
    3365083
  • Title

    Investigation of die-attach degradation using power cycling tests

  • Author

    Sarkany, Zoltan ; Vass-Varnai, Andras ; Rencz, Marta

  • Author_Institution
    Mentor Graphics Corp. Budapest, Budapest, Hungary
  • fYear
    2013
  • fDate
    11-13 Dec. 2013
  • Firstpage
    780
  • Lastpage
    784
  • Abstract
    This article describes a complex measurement and simulation based characterization method of high current IGBT modules. The method begins with thermal transient tests aimed at the investigation of the thermal behavior of the module and the creation of a thermal map of the heat conduction path using structure functions. This information can later be used for different purposes, such as the calibration of a detailed thermal simulation model of the system or as a reference for later power cycling reliability tests. During this test the degradation of the die attach layer as a result of power cycles is tracked as it is indicated by the structure functions. In the article we demonstrate the steps of this method with a detailed case-study.
  • Keywords
    heat conduction; insulated gate bipolar transistors; microassembling; semiconductor device reliability; semiconductor device testing; thermal analysis; transient analysis; die-attach degradation; heat conduction path; high current IGBT modules; power cycling reliability tests; simulation based characterization method; structure functions; thermal behavior; thermal map creation; thermal simulation model; thermal transient tests; Heating; Insulated gate bipolar transistors; Materials; Temperature measurement; Thermal resistance; Transient analysis; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4799-2832-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2013.6745827
  • Filename
    6745827