• DocumentCode
    3365163
  • Title

    Integration and optimization of 300 mm backside TSV revealing and Cu redistribution process enabled by ZoneBOND temporary bonding technology

  • Author

    Guan Kian Lau ; Ding, Lixin ; Tupaen, Hipona Randy ; Lo, G.Q.

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2013
  • fDate
    11-13 Dec. 2013
  • Firstpage
    793
  • Lastpage
    798
  • Abstract
    In this paper, we investigated the integrity and compatibility of various temporary adhesives using ZoneBOND technology for 3D TSV integration. Optimization of 300 mm TSV revealing and subsequent backside process have been investigated, including the temporary bonding, wafer thinning, Si recess etching, backside passivation, wafer planarization, backside Cu redistribution layer (RDL), and solder bumping fabrication.
  • Keywords
    adhesives; copper; elemental semiconductors; optimisation; silicon; three-dimensional integrated circuits; wafer bonding; 3D TSV integration; Cu; RDL; Si; Si recess etching; TSV revealing; ZoneBOND technology; backside Cu redistribution layer; backside passivation; backside process; optimization; size 300 mm; solder bumping fabrication; temporary adhesives; temporary bonding; wafer planarization; wafer thinning; Bonding; Etching; Films; Passivation; Silicon; Through-silicon vias;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC 2013), 2013 IEEE 15th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4799-2832-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2013.6745830
  • Filename
    6745830