High-frequency electronic package and interconnection effects

With data rates of future devices going beyond 10 gigabit/sec (Gb/s), it is essential that electrical parasitic effects must be taken into account early on in the design stage. This paper addresses the electrical issues of package design including propagation and parasitic effects of package structures. Using the finite-difference time-domain method as a high-frequency, full wave analysis mechanism various package types and parasitic effects of package structures are analyzed. These include package structures such as microstrip, conductor and non-conductor backed coplanar waveguides and vias. Benefits of flip-chip mounting, and packaging effects such as bond wires (single and multiple bond wires in parallel) and coupling between lines are examined using the developed FDTD code. Equivalent RLC circuit models for some of the analyzed structures are also presented.