DocumentCode :
3365496
Title :
Simulation for power integrity to design a PCB for an optimum cost
Author :
Fizesan, Raul ; Pitica, Dan
Author_Institution :
Appl. Electron. Dept., Tech. Univ. of Cluj-Napoca, Cluj-Napoca, Romania
fYear :
2010
fDate :
23-26 Sept. 2010
Firstpage :
141
Lastpage :
146
Abstract :
One of the biggest design challenges today is to properly design, manufacture, simulate and validate a Power Distribution Network (PDN) in systems with increasing speed, power dissipation and density. PDN are typically comprised of capacitors networks that have several types of capacitors and values to obtain target impedance over the required frequency range for the power/ground planes on PCBs. Capacitors provide a temporary source of localized energy for instantaneous current demands from an IC, and a low-impedance return path for high frequency noise. This paper propose a simulation test for a 4 layer PCB, with power/ground planes, to evaluate the effectiveness and importance of decoupling capacitors, using tools and methodologies to determine the important factors like performance, cost and board area.
Keywords :
circuit noise; printed circuit design; printed circuit testing; printed circuits; PCB; capacitor networks; high frequency noise; instantaneous current demands; localized energy; power dissipation; power integrity; power/ground planes; simulation test; Analytical models; Capacitors; Color; Impedance; Inductance; Integrated circuit modeling; Resonant frequency; decoupling capacitors; power and ground planes; power distribution network; power integrity; target impedance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Technology in Electronic Packaging (SIITME), 2010 IEEE 16th International Symposium for
Conference_Location :
Pitesti
Print_ISBN :
978-1-4244-8123-1
Type :
conf
DOI :
10.1109/SIITME.2010.5653491
Filename :
5653491
Link To Document :
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