DocumentCode
3365832
Title
Mitigating soft errors in SRAM-based FPGAs by using large grain TMR with selective partial reconfiguration
Author
Azambuja, José Rodrigo ; Pilotto, Conrado ; Kastensmidt, Fernanda Lima
Author_Institution
Inst. de Inf., Univ. Fed. do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
fYear
2008
fDate
10-12 Sept. 2008
Firstpage
288
Lastpage
293
Abstract
This work presents a method that allows dynamic partial reconfiguration with triple modular redundancy in SRAM-based FPGAs fault-tolerant designs. Experimental results show reduced time and energy in fault recovery compared to XTMR with scrubbing.
Keywords
SRAM chips; fault tolerance; field programmable gate arrays; logic design; FPGA; SRAM; dynamic partial reconfiguration; fault recovery; fault-tolerant design; selective partial reconfiguration; soft error mitigation; triple modular redundancy; Dynamic Partial Reconfiguration; FPGA; TMR; fault tolerance; soft errors;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation and Its Effects on Components and Systems (RADECS), 2008 European Conference on
Conference_Location
Jyvaskyla
ISSN
0379-6566
Print_ISBN
978-1-4577-0481-9
Type
conf
DOI
10.1109/RADECS.2008.5782729
Filename
5782729
Link To Document