Linear current mode imager with low fix pattern noise

Author

Gruev, Viktor ; Etienne-Cummings, Ralph ; Horiuchi, Timmer

Author_Institution

Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

Volume

4

fYear

2004

fDate

23-26 May 2004

Abstract

A new imaging architecture with a linear current mode active pixel sensor (APS) is presented. Focal plane image processing in the current domain includes a correlated double sampling (CDS) unit for fixed pattern noise (FPN) suppression. The CDS unit is composed of a first generation current conveyer circuit and a class AB cascaded current memory cell. A measured FPN of 0.9% from saturation level is achieved with the CDS unit compared to 1.9% FPN from current mode images without noise suppression circuitry. A 40 by 40 imaging array was fabricated in a standard 0.5 μm process and its functionality was successfully tested. Theoretical analysis for second order non-linear effects is also presented.

Keywords

CMOS image sensors; image processing; image sampling; integrated circuit noise; 0.5 micron; correlated double sampling; current conveyer circuit; current memory cell; fixed pattern noise suppression; focal plane image processing; linear current mode active pixel sensor; linear current mode imager; low fix pattern noise; second order nonlinear effect; Circuit noise; Computer architecture; Convolution; Image processing; Image sensors; Noise measurement; Photoconductivity; Pixel; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329140

Filename

1329140