Effect of Mismatch on Substrate Noise Coupling on Flash A/D Converters

This paper proposes a model to evaluate the impact of substrate noise on a CMOS regenerative comparator and on a flash A/D converter. The presented approach initially relates the induced timing uncertainty of the comparator to the substrate noise and accounts for possible mismatches in the comparator. Subsequently, the obtained expression for the timing uncertainty is used to derive a generalized expression for the SNR reduction in flash A/D converters that incorporate mismatched comparators. The developed approach is validated on a 10-bit flash A/D and is utilized to investigate performance degradation of practical converters.