DocumentCode
3366950
Title
Automation of engineering lot split-less for research and development fab
Author
Orimoto, Junji ; Sugikawa, Yutaka ; Sada, Toshihiro ; Kabata, Kazuo ; Miyoshi, Hiroki ; Nagata, Tomotaka ; Shirai, Hidenori
Author_Institution
VLSI Manuf. Eng. Div., NEC Corp., Sagamihara, Japan
fYear
1999
fDate
1999
Firstpage
93
Lastpage
96
Abstract
Recently the market demands quick turn around time (TAT) to highly advanced R&D fab. The analysis on the lot TAT in our fab showed that the time for engineering lot split at ion implantation process reached to about 7.2% of the total lot TAT. The automation to enable split-less engineering lot at ion implantation could reduce the operation time in R&D fab. Engineering lot split-less systems could reduce the operation time with lot split operation by 3/4 for ion implantation. This system consists of manufacturing execution system (MES), master maintenance system (MMS), and engineering management system (EMS). This realized the 24 hours automated transfer of Engineering lot without any lot split operations
Keywords
factory automation; integrated circuit manufacture; ion implantation; research and development management; automation; engineering lot split-less; engineering management system; ion implantation; manufacturing execution system; master maintenance system; operation time; research and development fab; semiconductor wafer fabrication; turn around time; Automotive engineering; Ion implantation; Level control; Manufacturing automation; National electric code; Production; Research and development; Research and development management; Systems engineering and theory; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Conference Proceedings, 1999 IEEE International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
0-7803-5403-6
Type
conf
DOI
10.1109/ISSM.1999.808746
Filename
808746
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