DocumentCode
3367053
Title
Characterization algorithm of failure distribution for lsi yield improvement
Author
Sugimoto, Masaaki ; Tanaka, Mikio
Author_Institution
Device Anal. Technol. Labs., NEC Corp., Kawasaki, Japan
fYear
1999
fDate
13-13 Oct. 1999
Firstpage
119
Lastpage
122
Abstract
This paper describes about an algorithm, which can efficiently characterize a process-induced random failure distribution and a design-induced systematic failure distribution from unknown-induced failure distributions of a memory LSI to predict a reason for yield degradation in it. Our developed algorithm analyzes a function "T(f) isn\´t greater than 1 or not" related kind and the content of the mathematics measure "f" comes from a histogram of all pair of failure distances to distinguish between a random distribution and a systematic distribution. The cause specification using this algorithm is based on the fact that process induced failure caused by particles or contamination results in a random distribution and design-induced failures have some kind of distribution shape or period depending on circuit layout. Memory LSI failure analysis with our algorithm is able to distinguish between an almost random (process-induced) distribution in one direction, and a systematic (design induced) distribution in the other. This algorithm is effective for a device containing an array of cells.
Keywords
failure analysis; integrated circuit layout; integrated circuit reliability; integrated circuit yield; integrated memory circuits; random processes; LSI yield improvement; cause specification; cellular array; circuit layout; design-induced systematic failure distribution; failure distance histogram; failure distribution characterization algorithm; memory LSI; memory LSI failure analysis; process-induced random failure distribution; random distribution; systematic distribution; yield degradation; Algorithm design and analysis; Circuits; Contamination; Degradation; Failure analysis; Histograms; Large scale integration; Mathematics; Pollution measurement; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Conference Proceedings, 1999 IEEE International Symposium on
Conference_Location
Santa Clara, CA, USA
ISSN
1523-553X
Print_ISBN
0-7803-5403-6
Type
conf
DOI
10.1109/ISSM.1999.808752
Filename
808752
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