DocumentCode :
3367092
Title :
Dual use of power lines for data communications in microprocessors
Author :
Chawla, Vipul ; Ha, Dong Sam
fYear :
2011
fDate :
13-15 April 2011
Firstpage :
23
Lastpage :
28
Abstract :
We proposed power line communication (PLC) through a microprocessor´s power distribution network as a novel technique for communicating to any node inside a chip and demonstrated the suitability of Impulse Ultra-Wideband (UWB) communication. Applications of this scheme discussed in this paper exemplify the applicability of this scheme in future microprocessors. Further, data recovery block design is presented which detects short duration UWB impulses on its power line. The design has been done in IBM 0.13 um digital CMOS process and has been shown to consume 3.58 mW when operating from 1.2 V supply.
Keywords :
CMOS integrated circuits; carrier transmission on power lines; microprocessor chips; ultra wideband communication; CMOS process; data communications; impulse ultra-wideband communication; microprocessors; power line communication; Clocks; Microprocessors; Mixers; Monitoring; Power line communications; Power supplies; Receivers; CMOS; Impulse-UWB Receiver; Microprocessors; Power Line Communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Conference_Location :
Cottbus
Print_ISBN :
978-1-4244-9755-3
Type :
conf
DOI :
10.1109/DDECS.2011.5783041
Filename :
5783041
Link To Document :
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