A Fast-Locking Agile Frequency Synthesizer for MIMO Dual-mode WiFi / WiMAX Applications

Author

Tsai, Meng-Ting ; Yang, Ching-Yuan

Author_Institution

Ind. Technol. Res. Inst. Hsinchu, Hsinchu

fYear

2007

fDate

11-14 Dec. 2007

Firstpage

1384

Lastpage

1387

Abstract

In this paper, a frequency synthesizer based on phase-locked loop (PLL) technique for dual-mode WiFi (2.4-GHz band) and WiMax (5-GHz band) applications is presented. The frequency synthesizer with wide frequency range application and the settling time within 10-mus is realized by a time-to-voltage converter (TVC). A 40-MHz input reference for 125-KHz frequency steps which is realized by a 12-bits MASH 1-1 delta-sigma modulator for fractional divisions. The frequency synthesizer provides output frequency ranges from 4.6-GHz to 5.4-GHz with simulated phase noise of around -110 dBc/Hz at 1-MHz offset. Simulated in standard 0.13-mum CMOS process, the frequency synthesizer dissipates 40-mW from a 1.2-V power supply.

Keywords

MIMO communication; delta-sigma modulation; frequency synthesizers; phase locked loops; wireless LAN; MIMO system; delta-sigma modulator; dual-mode WiFi/WiMAX application; fast-locking agile frequency synthesizer; multiple input multiple output; phase-locked loop; time-to-voltage converter; wide frequency range application; wireless fidelity; CMOS process; Delta modulation; Frequency conversion; Frequency synthesizers; MIMO; Multi-stage noise shaping; Phase locked loops; Phase noise; Power supplies; WiMAX;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on

Conference_Location

Marrakech

Print_ISBN

978-1-4244-1377-5

Electronic_ISBN

978-1-4244-1378-2

Type

conf

DOI

10.1109/ICECS.2007.4511257

Filename

4511257