Title :
A Low-Noise Fractional-N Frequency Synthesiser Using A Very Fast Noise Shaper
Author :
Wang, Hongyu ; Brennan, Paul V. ; Jiang, Dai
Author_Institution :
Univ. Coll. London, London
Abstract :
This paper presents a fractional-N frequency synthesiser architecture capable of achieving low output phase noise and fast switching simultaneously. The proposed synthesiser is based on a high frequency FPGA implementation of stored-sequence sigma-delta noise shaping, replacing the conventional CMOS component. The synthesiser has a -105 dBc/Hz low in-band phase noise at 2 KHz offset, and it can complete the channel switching process within 10 mus. This architecture is flexible to be programmed according to different requirements and it is suitable for many wireless applications as a low noise and low cost solution.
Keywords :
field programmable gate arrays; frequency synthesizers; phase noise; telecommunication switching; channel switching; fast switching; high frequency FPGA implementation; low output phase noise; low-noise fractional-N frequency synthesiser; noise shaper; stored-sequence sigma-delta noise shaping; Bandwidth; Base stations; Control system synthesis; Frequency conversion; Frequency synthesizers; Noise shaping; Phase locked loops; Phase noise; Signal synthesis; Switches;
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
DOI :
10.1109/ICECS.2007.4511258
