DocumentCode
3367445
Title
A chaos-based pseudo-random bit generator implemented in FPGA device
Author
Dabal, Pawel ; Pelka, Ryszard
Author_Institution
Dept. of Electron. Eng., Mil. Univ. of Technol., Warsaw, Poland
fYear
2011
fDate
13-15 April 2011
Firstpage
151
Lastpage
154
Abstract
This paper presents results of studies on the implementation of pseudo-random bit generators based on a nonlinear dynamic chaotic system. Several solutions have been investigated, using different computing precision and various implementation of arithmetic operations. The results of the second level NIST tests for randomness of the proposed pseudo-random bit generators (PRBGs) are presented, that proved good cryptographic properties of the presented PRBGs. The generators described in this paper can be used for key generation in stream ciphers in secure, real-time transmission of digital signals, including audio-video applications.
Keywords
chaos; cryptography; field programmable gate arrays; random number generation; FPGA device; NIST tests for randomness; chaos-based pseudo-random bit generator; cryptographic properties; key generation; nonlinear dynamic chaotic system; stream ciphers; Chaotic communication; Cryptography; Field programmable gate arrays; Generators; Logistics; NIST; cryptographic security; logistic map; nonlinear chaotic dynamic system; pseudo-random bit generator;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Conference_Location
Cottbus
Print_ISBN
978-1-4244-9755-3
Type
conf
DOI
10.1109/DDECS.2011.5783069
Filename
5783069
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