• DocumentCode
    3367552
  • Title

    A study of path delay variations in the presence of uncorrelated power and ground supply noise

  • Author

    Todri, A. ; Bosio, A. ; Dilillo, L. ; Girard, P. ; Pravossoudovitch, S. ; Virazel, A.

  • Author_Institution
    LIRMM, Univ. of Montpellier II, Montpellier, France
  • fYear
    2011
  • fDate
    13-15 April 2011
  • Firstpage
    189
  • Lastpage
    194
  • Abstract
    As technology scales down, the effects of power supply noise and ground bounce are becoming significantly important. In the existing literature, it has been shown that excessive power supply noise can affect the path delay, while ground bounce is either neglected or assumed similar to power supply noise. In this work, we present a detailed study of combined and uncorrelated power supply noise and ground bounce and their impact on the path delay. Our analyses show that different combination of power supply noise and ground bounce can lead to either delay speed-up or slow-down. Furthermore, our study shows the degrading influence of supply noise resonance on the path delay. We perform HSPICE simulations for path delay analysis on various technology nodes i.e. 130nm, 90nm, 65nm and 45nm.
  • Keywords
    buffer circuits; delays; earthing; integrated circuit modelling; integrated circuit noise; power supply circuits; HSPICE simulation; ground bounce; ground supply noise; path delay variation; size 130 nm to 45 nm; uncorrelated power supply noise; Delay; Inductance; Logic gates; Noise; Power supplies; Resonant frequency; Transistors; IR drop; ground bounce; path delay; resonance frequency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
  • Conference_Location
    Cottbus
  • Print_ISBN
    978-1-4244-9755-3
  • Type

    conf

  • DOI
    10.1109/DDECS.2011.5783078
  • Filename
    5783078