32x32 oscillator network chip for binary image segmentation

This paper presents the 32times32 CMOS VLSI chip of synchronised oscillators network designed for fast segmentation and labeling of binary images. The network chip architecture and its functional blocs were briefly described. The hardware realisation of oscillator network provides much faster image segmentation when compared to computer simulation techniques. Segmentation results of sample biomedical image obtained using the oscillator network chip are also presented and discussed.