Multirate as a hardware paradigm

Author

Suter, B.W. ; Stevens, K.S. ; Elazquez, S.R. ; Nguyen, T.

Author_Institution

Air Force Res. Lab., IFGC, Rome, NY, USA

Volume

4

fYear

1999

fDate

15-19 Mar 1999

Firstpage

1885

Abstract

The architecture and circuit design are the two most effective means of reducing power in CMOS VLSI. Mathematical manipulations, based on applying ideas from multirate signal processing have been applied to create high performance, low power architectures. To illustrate this approach, two case studies are presented-one concerns the design of a fast Fourier transform (FFT) device, while the other one is concerned with the design of analog-to-digital converters

Keywords

CMOS digital integrated circuits; VLSI; analogue-digital conversion; digital signal processing chips; fast Fourier transforms; integrated circuit design; CMOS VLSI; FFT device; analog-to-digital converters; circuit architecture; circuit design; fast Fourier transform; hardware paradigm; high performance architecture; low power architecture; multirate signal processing; CMOS logic circuits; Design methodology; Differential equations; Digital signal processing chips; Flexible printed circuits; Frequency domain analysis; Hardware; Pipeline processing; Silicon; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on

Conference_Location

Phoenix, AZ

ISSN

1520-6149

Print_ISBN

0-7803-5041-3

Type

conf

DOI

10.1109/ICASSP.1999.758291

Filename

758291