DocumentCode
3369111
Title
Multiplier blocks using carry-save adders
Author
Gustafsson, Oscar ; Dempster, Andrew G. ; Wanhammar, Lars
Author_Institution
Dept. of Electr. Eng., Linkoping Univ., Sweden
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
Multiplier blocks have been shown to require a small number of adders for multiplying one data sample with multiple, constant, coefficients. The previously proposed multiplier block algorithms have been using carry-propagation adders. However, for high-speed applications carry-save adders are a better choice. Although it is possible to map carry-save adders to carry-propagation adders, it is shown that this mapping is inconsistent in the number of carry-save adders required for a given number of carry-propagation adders for multiplier blocks. Therefore, a multiplier block algorithm for carry-save adders is proposed. It is shown that the proposed algorithm is producing multiplier blocks with consistently fewer carry-save adders compared with starting with a carry-propagation multiplier block and mapping it to carry-save adders. Further, it is shown that the proposed algorithm produces multiplier blocks with fewer carry-save adders than algorithms based on subexpression sharing.
Keywords
adders; carry logic; multiplying circuits; carry propagation adders; carry-propagation multiplier block; carry-save adders; mapping; multiplier block algorithm; multiplier blocks; Arithmetic; Costs; Digital signal processing; Finite impulse response filter; Hardware; Merging; Pattern matching; Propagation delay;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329311
Filename
1329311
Link To Document