Impact of VLSI design rules on high voltage (2000 V) IGBTs/ESTs

MOS-gated bipolar devices are rapidly replacing traditional bipolar devices in increasingly higher voltage regimes. The advantages of MOS-gate control and current saturation capability make the IGBT and the dual channel emitter switched thyristor (DC-EST) most likely to replace the GTO in the 2-4 kV voltage regime. However, power device design still lags behind CMOS design in utilizing the better design rules that are easily attainable with current processing technology at reasonable cost. Furthermore, the advantages that can be achieved by moving towards thinner gate oxides have not yet been fully realized in power devices. In this paper, extremely low forward drop, high voltage IGBTs and DC-ESTs are experimentally demonstrated using VLSI design rules for the first time. It is shown that conventional planar processing technology coupled with superior design rules and thinner gate oxides can lead to extremely wide forward bias SOA (FBSOA)