Title :
An ultra-low power K-band low-noise amplifier co-designed with ESD protection in 40-nm CMOS
Author :
Tsai, Ming-Hsien ; Hsu, Shawn S H ; Hsueh, Fu-Lung ; Jou, Chewn-Pu ; Yeh, Tzu-Jin ; Song, Ming-Hsiang ; Tseng, Jen-Chou
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
This paper presents a K-band low noise amplifier (LNA) co-designed with ESD protection circuit in 40-nm CMOS technology. By treating ESD devices as a part of the input matching network, an ESD protected 24-GHz LNA is demonstrated with a NF of 3.2 dB under a power consumption of only 4.1 mW. The ESD protection network is composed of dual-diode and a gate-driven power clamp achieving an ESD level of 2.8 kV human body model (HBM). Owing to the co-design approach, the NF only degrades by 0.2 dB compared with the reference LNA without the ESD network. The ESD-LNA presents a power gain of 13.0 dB with the input and output return losses both greater than 10 dB. To the best of our knowledge, this is the first report on a 24-GHz ESD-protected LNA in 40-nm CMOS.
Keywords :
CMOS integrated circuits; low noise amplifiers; low-power electronics; CMOS technology; ESD protection circuit; LNA; frequency 24 GHz; gate-driven power clamp; human body model; input matching network; power consumption; size 40 nm; ultralow power K-band low-noise amplifier; voltage 2.8 kV; CMOS integrated circuits; CMOS technology; Clamps; Electrostatic discharge; Low-noise amplifiers; Noise measurement; Radio frequency; electrostatic discharge (ESD); low-noise amplifier (LNA); radio frequency (RF); shallow-trench isolation (STI);
Conference_Titel :
IC Design & Technology (ICICDT), 2011 IEEE International Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4244-9019-6
DOI :
10.1109/ICICDT.2011.5783220