DocumentCode :
3370044
Title :
Evaluating GPUs for network packet signature matching
Author :
Smith, Randy ; Goyal, Neelam ; Ormont, Justin ; Sankaralingam, Karthikeyan ; Estan, Cristian
Author_Institution :
Univ. of Wisconsin-Madison, Madison, WI
fYear :
2009
fDate :
26-28 April 2009
Firstpage :
175
Lastpage :
184
Abstract :
Modern network devices employ deep packet inspection to enable sophisticated services such as intrusion detection, traffic shaping, and load balancing. At the heart of such services is a signature matching engine that must match packet payloads to multiple signatures at line rates. However, the recent transition to complex regular-expression based signatures coupled with ever-increasing network speeds has rapidly increased the performance requirements of signature matching. Solutions to meet these requirements range from hardware-centric ASIC/FPGA implementations to software implementations using high-performance microprocessors. In this paper, we propose a programmable signature matching system prototyped on an Nvidia G80 GPU. We first present a detailed architectural and microarchitectural analysis, showing that signature matching is well suited for SIMD processing because of regular control flow and parallelism available at the packet level. Next, we examine two approaches for matching signatures: standard deterministic finite automata (DFAs) and extended finite automata (XFAs), which use far less memory than DFAs but require specialized auxiliary memory and small amounts of computation in most states. We implement a fully functional prototype on the SIMD-based G80 GPU. This system out-performs a Pentium4 by up to 9X and a Niagara-based 32-threaded system by up to 2.3X and shows that GPUs are a promising candidate for signature matching.
Keywords :
application specific integrated circuits; computer networks; deterministic automata; digital signatures; field programmable gate arrays; finite automata; microprocessor chips; parallel architectures; security of data; Nvidia G80 GPU; SIMD processing; SIMD-based G80 GPU; extended finite automata; hardware-centric ASIC-FPGA implementation; high-performance microprocessor; intrusion detection; load balancing; microarchitectural analysis; network device; network packet signature matching; network speed; packet inspection; packet payload; performance requirement; programmable signature matching system; regular-expression based signature; standard deterministic finite automata; traffic shaping; Application specific integrated circuits; Automata; Engines; Heart; Inspection; Intrusion detection; Load management; Payloads; Prototypes; Telecommunication traffic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4244-4184-6
Type :
conf
DOI :
10.1109/ISPASS.2009.4919649
Filename :
4919649
Link To Document :
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