Title :
Online compression of cache-filtered address traces
Author_Institution :
INRIA Rennes - Bretagne Atlantique, Rennes
Abstract :
Trace-driven simulation is potentially much faster than cycle-accurate simulation. However, one drawback is the large amount of storage that may be necessary to store traces. Trace compression techniques are useful for decreasing the storage space requirement. But the compression ratio of existing trace compressors is limited because they implement lossless compression. We propose two new methods for compressing cache filtered address traces. The first method, byte sort, is a lossless compression method that achieves high compression ratios on cache-filtered address traces. The second method is a lossy one, based on the concept of phase. We have combined these two methods in a trace compressor called ATC. Our experimental results show that ATC gives high compression ratio while keeping the memory-locality characteristics of the original trace.
Keywords :
cache storage; data compression; storage allocation; cache filtered address traces; cycle accurate simulation; high compression ratio; lossless compression; online compression; storage space requirement; trace compression; trace compressor; trace driven simulation; Compressors; Computational modeling; Computer architecture; Computer simulation; Filtering; Hardware; Microarchitecture; Microscopy; Multicore processing; Space exploration;
Conference_Titel :
Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4244-4184-6
DOI :
10.1109/ISPASS.2009.4919650