DocumentCode
3370072
Title
Mixed RL-Huffman encoding for power reduction and data compression in scan test
Author
Tehranipour, M.H. ; Nourani, M. ; Arabi, K. ; Afzali-Kusha, A.
Author_Institution
Texas Univ., Richardson, TX, USA
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
This paper mixes two encoding techniques to reduce test data volume, test pattern delivery time and power dissipation in scan test applications. This is achieved by using the Run-Length (RL) encoding followed by Huffman encoding. This combination is especially effective when the ratio of don´t cares in a test set is high which is a common case in today´s large SoCs. Our analytical analysis and the experimental results on ISCAS89 benchmarks confirm that achieving 32 to 85% compression ratio and 55 to 93% power reduction is possible for scan testable SoCs.
Keywords
Huffman codes; boundary scan testing; data compression; encoding; low-power electronics; runlength codes; system-on-chip; Huffman encoding; ISCAS89 benchmarks; data compression; power dissipation; power reduction; runlength encoding; scan testable SoC; system on chip; test data volume reduction; test pattern delivery time; Automatic test pattern generation; Circuit testing; Costs; Data compression; Design for testability; Encoding; Power dissipation; Switches; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329363
Filename
1329363
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