Layout optimization to maximize tolerance in SEILA: Soft error immune latch

The purpose of this paper is optimization of layout on soft error immune latch (SEILA) for maximizing soft-error mitigation efficiency, and investigating mechanisms of charge collection on multi-node and discussing layout dependence on soft-error. We evaluate soft-error rate (SER) on un-robust latch, conventional robust latch, SEILA with changing well structure, distances from well-contacts, and distance between soft-error critical nodes through neutron acceleration experiments at Osaka Univ. Soft-error mitigation efficiency awfully change with changing layout. In designing robust latches, it is most important for high the mitigation to separated critical nodes with STI and we need to take care on layout especially distance between critical nodes.