Electrical properties of orientation-mismatched interface of (311)B InP/(100) GaAs, and the effect of surface preparation methods

Author

Okuno, Y.L. ; Bowers, John E.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA

fYear

2004

fDate

31 May-4 June 2004

Firstpage

314

Lastpage

317

Abstract

We investigated electrical conductivity across orientation- and lattice mismatched interface formed by wafer bonding. An interface of (311)B InP and (100) GaAs wafer had a barrier height (Vb) of about 0.5 eV, which was higher than that of a bonded interface of (100) InP/(100) GaAs due to an orientation mismatch. The effect of surface treatment method before the bonding process was also investigated, and it was shown that the Vb is lower for the interface formed by bonding wafers with dry surface. Although the Vb was high for the (311)B InP/(100) GaAs interface, it had a decent conductivity, and we believe that such an integrated structure is beneficial for fabricating new types of devices such as long-wavelength VCSEL with polarization control.

Keywords

III-V semiconductors; electrical conductivity; gallium arsenide; indium compounds; semiconductor junctions; surface treatment; wafer bonding; InP-GaAs; VCSEL; electrical conductivity; orientation-mismatched interface; polarization control; surface treatment method; wafer bonding; Conducting materials; Conductivity; Crystalline materials; Gallium arsenide; Indium gallium arsenide; Indium phosphide; Surface morphology; Surface treatment; Vertical cavity surface emitting lasers; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on

ISSN

1092-8669

Print_ISBN

0-7803-8595-0

Type

conf

DOI

10.1109/ICIPRM.2004.1442718

Filename

1442718