• DocumentCode
    3371394
  • Title

    −65dBHD3 CMOS tunable OTA with mobility reduction compensation

  • Author

    Cheng, Shih-Tung ; Chang, Wei-Hsiu ; Hung, Chung-Chih

  • Author_Institution
    Dept. of Electr. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    2011
  • fDate
    25-28 April 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about -65 dB at 1 MHz for a 1.2-Vpp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427 mW.
  • Keywords
    CMOS integrated circuits; harmonic distortion; operational amplifiers; CMOS process technology; frequency 1 MHz; mobility reduction compensation; operational transconductance amplifier; third-order harmonic distortion; tunable OTA; voltage 1.2 V; CMOS integrated circuits; Harmonic distortion; Linearity; Power demand; Transconductance; Transistors; Tuning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test (VLSI-DAT), 2011 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    Pending
  • Print_ISBN
    978-1-4244-8500-0
  • Type

    conf

  • DOI
    10.1109/VDAT.2011.5783547
  • Filename
    5783547
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3371394