DocumentCode
3371472
Title
The de-bias effect of gate current in InP HEMT MMICs
Author
Chou, Yeong Chang ; Truong, M. ; Leung, D. ; Grundbacher, R. ; Lai, R. ; Eng, D. ; Block, T. ; Oki, A.
Author_Institution
Northrop Grumman Space Technol., Redondo Beach, CA, USA
fYear
2004
fDate
31 May-4 June 2004
Firstpage
393
Lastpage
396
Abstract
Increased gate current of InP HEMTs subjected to elevated temperature lifetest has been observed. The higher the temperature and the larger the gate periphery, the higher the gate current. On the other hand, gate resistors (Rg) are often used in the MMIC design for stability. As a result, the high gate current in conjunction with Rg de-biases the transistors in InP HEMT MMICs under elevated temperature lifetest. Accordingly, the evolution of DC parameters between discrete transistors and MMICs illustrates distinct difference. Furthermore, the de-bias effect of gate current in InP HEMT MMICs strongly depends on the lifetest temperature, gate periphery, and gate resistor. As a result, consideration of lifetest temperature, gate periphery, and gate resistors in InP HEMT MMICs is crucial in order to mitigate the de-bias effect induced by elevated temperature lifetest. In this paper, the de-bias effect of gate current in InP HEMT MMICs was illustrated for the first time.
Keywords
HEMT integrated circuits; III-V semiconductors; MMIC; high electron mobility transistors; indium compounds; life testing; resistors; semiconductor device testing; HEMT MMIC; InP; de-bias effect; gate current; gate resistors; temperature lifetest; Gallium arsenide; HEMTs; Indium phosphide; MMICs; PHEMTs; Resistors; Roentgenium; Space technology; Temperature; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on
ISSN
1092-8669
Print_ISBN
0-7803-8595-0
Type
conf
DOI
10.1109/ICIPRM.2004.1442738
Filename
1442738
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