MACS: a predictable architecture for real time systems

The MACS (multiple active context system) architecture is a high-performance, multiple context, cacheless processor designed around the goal of predictability. Multiple contexts provide highly predictable memory and pipeline performance, while at the same time allowing multiple threads to execute with independent timing characteristics. The design emphasis is on provable execution speed and independent timing of each context. Task-level parallelism is used to maintain high processor throughput while individual threads execute at a relatively slow, but very predictable, rate. The authors investigate the suitability of such a system to real time and determine how predictability varies as a function of parallelism (performance), memory issue latency and memory size