Title :
Behavioural modelling of analog circuits by dynamic semi-symbolic analysis
Author :
Yang, Junjie ; Tan, Sheldon X D
Author_Institution :
Dept. of Electr. Eng., California Univ., Riverside, CA, USA
Abstract :
The paper presents an approach to behavioural modelling of analog circuits by dynamic semi-symbolic analysis, where some circuit parameters are kept as symbols and the others are given as numeric values. Our new method is based on the determinant decision diagram (DDD) representation of small-signal characteristics of linear analog circuits. The basic idea is to dynamically reorder DDD vertices such that all the DDD vertices corresponding to symbolic parameters are separated from DDD vertices for numerical parameters. In this way, DDD sizes of symbolic portion of DDD can be significantly reduced by suppressing numerical DDD nodes. Our new approach is different from the existing MTDDD based semi-symbolic analysis method where reordering is done before DDD is constructed and DDD-based graph operations are still valid in the new method. The proposed dynamic ordering algorithm, which is based on swap of adjacent variables, also improves the existing DDD-based vertex sifting algorithm as no special sign rule is required after DDD vertices are swapped. Experimental results have demonstrated that the proposed dynamic semi-symbolic method leads to up to 30% symbolic DDD node reduction compared MTDDD method on real analog circuits and can be performed very efficiently.
Keywords :
analogue integrated circuits; decision diagrams; determinants; integrated circuit modelling; symbol manipulation; DDD representation; DDD vertices; DDD-based graph; DDD-based vertex sifting; MTDDD method; adjacent variables; behavioural modelling; circuit parameters; determinant decision diagram; dynamic ordering; dynamic semisymbolic analysis; linear analog circuits; numerical parameters; small-signal characteristics; symbolic DDD node reduction; symbolic parameters; Analog circuits; Circuit analysis; Circuit stability; Circuit synthesis; Circuit topology; Design optimization; Frequency; Heuristic algorithms; Performance gain; Stability analysis;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329469