Design of a step-up dc-dc converter with on-chip coupled inductors

A monolithic step-up dc-dc converter with on-chip spiral inductors is designed and simulated to determine its feasibility for low-power portable applications. The converter is operated at a relatively high frequency of 600 MHz to reduce passive component sizes. Quality factor limitations of on-chip inductors are mitigated without increasing the area by implementing multiple spirals on different layers and exploiting their mutual inductance. The simulations for a 0.18 μm CMOS process demonstrate the viability of the proposed circuit with a peak efficiency of 74.4% at a load current of 15 mA.