• DocumentCode
    3372335
  • Title

    iTEM: a chip-level electromigration reliability diagnosis tool using electrothermal timing simulation

  • Author

    Teng, Chin-Chi ; Cheng, Yi-Kan ; Rosenbaum, Elyse ; Kang, Sung-Mo

  • Author_Institution
    Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
  • fYear
    1996
  • fDate
    April 30 1996-May 2 1996
  • Firstpage
    172
  • Lastpage
    179
  • Abstract
    In this paper, we present a new electromigration reliability diagnosis tool (iTEM) for CMOS VLSI circuits. Unlike previous electromigration reliability tools, iTEM can estimate the interconnect temperature rise due to joule heating and heat conduction from the substrate using a newly developed lumped thermal model. Including the temperature effect, iTEM provides more accurate electromigration reliability diagnosis. Moreover, it is very fast and can analyze circuit layouts containing tens of thousands of transistors on a desktop workstation.
  • Keywords
    CMOS integrated circuits; VLSI; electromigration; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; timing; CMOS VLSI circuit; chip-level electromigration reliability diagnosis tool; desktop workstation; electrothermal timing simulation; iTEM; interconnect temperature rise; joule heating; lumped thermal model; substrate heat conduction; Circuit simulation; Computational modeling; Electromigration; Electrothermal effects; Heating; Integrated circuit interconnections; Integrated circuit reliability; Temperature; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 1996. 34th Annual Proceedings., IEEE International
  • Conference_Location
    Dallas, TX, USA
  • Print_ISBN
    0-7803-2753-5
  • Type

    conf

  • DOI
    10.1109/RELPHY.1996.492078
  • Filename
    492078