DocumentCode
337283
Title
Associative matrix for nano-scale integrated circuits
Author
Glösekötter, Peter ; Pacha, Christian ; Goser, Karl
Author_Institution
Dept. of Microelectron., Dortmund Univ., Germany
fYear
1999
fDate
1999
Firstpage
352
Lastpage
358
Abstract
Moving towards minimum feature sizes of nanometric scale, a new computational architecture for future nano-scale integration is presented. Due to the fact that resonant tunneling diodes are very promising devices, they are applied to a novel associative matrix architecture. Fault and error tolerance as well as high computational power (word-parallel realization) are inherently related features of such structures that display their full performance in the application presented here. By means of devices with increased functionality, relative complex circuit functions are performed at high speed with reduced component counts
Keywords
content-addressable storage; fault tolerant computing; heterojunction bipolar transistors; integrated memory circuits; nanotechnology; parallel memories; resonant tunnelling diodes; AND-SRAM cell design; NAND-HBT gate; RTD; associative matrix architecture; complex circuit functions; computational architecture; error tolerance; fault tolerance; high speed operation; minimum feature sizes; nano-scale integrated circuits; nanoscale integration; resonant tunneling diodes; word-parallel realization; Circuit faults; Computer architecture; Computer displays; Electronic mail; Fault tolerance; Frequency; High performance computing; Microelectronics; Nanoscale devices; Resonant tunneling devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on
Conference_Location
Granada
Print_ISBN
0-7695-0043-9
Type
conf
DOI
10.1109/MN.1999.758886
Filename
758886
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