Built-in self-diagnosis and test time reduction techniques for NAND flash memories

This paper presents a low-cost built-in self-diagnosis (BISD) scheme for NAND flash memories, which can support the March-like test algorithms with page-oriented data backgrounds. Two simple test time reduction techniques are also proposed to reduce the test time. Experimental results show that the proposed BISD circuit for a 2M-bit flash memory only needs 1.7K gates. Also, the proposed test time reduction techniques can effectively reduce the test time. Analysis results show that they can reduce the test time to 48.628% of the normal test scheme for a 4G-bit flash memory tested by the March-FT test algorithm with solid data backgrounds.