DocumentCode
3373000
Title
Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes
Author
Wu, Yu-Ze ; Chao, Mango C -T
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu
fYear
2008
fDate
April 27 2008-May 1 2008
Firstpage
147
Lastpage
154
Abstract
This paper proposes a scan-cell reordering scheme, named ROBPR, to reduce the signal transitions during test mode while preserving the don´t-care bits in the test patterns for a later optimization. Combined with a pattern-filling technique, the proposed scheme utilizes both response correlation and pattern correlation to simultaneously minimize scan-out and scan-in transitions. A series of experiments demonstrate the effectiveness and superiority of the proposed scheme on reducing total scan-shift transitions. The trade-off between our power-driven scan-cell reordering and a routing-driven scan-cell reordering is discussed based on experiments as well.
Keywords
circuit testing; design for testability; non-specified test cubes; pattern correlation; power-driven scan-cell reordering; response correlation; routing-driven scan-cell reordering; scan-chain reordering; scan-shift power; Centralized control; Circuit testing; Clocks; Electronic equipment testing; Energy consumption; Power engineering and energy; Power generation; Signal design; Signal generators; Test pattern generators; correlation; reordering; scan-chain; signal transitions;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2008. VTS 2008. 26th IEEE
Conference_Location
San Diego, CA
ISSN
1093-0167
Print_ISBN
978-0-7695-3123-6
Type
conf
DOI
10.1109/VTS.2008.16
Filename
4511712
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